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agilent acpm-7891 tri-band power amplifier module egsm, dcs and pcs multi-slot gprs data sheet and application note description the acpm-7891 is a fully matched tri-band egsm/dcs/ pcs power amplifier module designed on agilent technologies leading edge enhancement mode phemt (e-phemt) process. the acpm-7891 has the highest power-added efficiency (pae) for all three bands of operation in the industry, enabling customers to design handset, pda and data card with up to 15% longer transmit or talk time. the agilent acpm-7891 provides a cost effective dual or tri-band gsm pa solution with the addi- tional benefit of excellent effi- ciency enabling multi-slot gprs operation and extended transmit time. the device is internally matched to 50 ? and therefore an effective design can be imple- mented quickly with a few additional capacitors for d.c. blocking of the output ports and bypassing of the supply pins. features ? highest power added efficiency in the industry ? performance guaranteed for gprs class 10 (2-slot) transmit operation ? broadband dcs/pcs match for flat p out and pae ? low harmonics ? single 3.5 volt supply (nominal) ? 50 ohms input & output impedance ? small smt package 6 x 12 x 1.4 mm specifications ? 60% pae at +35 dbm p out for esgm ? 56% pae at +32.5 dbm p out for dcs 1800 ? 56% pae at +32.5 dbm p out for pcs 1900 applications ? cellular handsets ? data modules for pda ? data cards for laptops 1 13 gnd 12 gnd 11 rf out dcs/pcs 10 gnd 9 gnd 8 gnd 7 gnd 6 rf out egsm 5 gnd 18 rf in dcs/pcs rf in egsm v dd1,2 dcs/pcs 19 gnd 20 21 v dd1,2 bypass 22 gnd gnd 23 v dd1,2 bypass v dd1,2 egsm 24 25 26 gnd 2 v apc egsm 3 gnd yywwddllll agilent acpm-7891 4 17 16 15 14 v dd3 egsm gnd v apc dcs/pcs gnd v dd3 dcs/pcs pin connections and package marking notes: package marking provides orientation and identification. yywwddllll = year, week, day and lot code indicates the year, week, day and lot of manufacture.
2 absolute maximum ratings symbol parameter units absolute maximum v dd supply voltage v 6 p in max input power dbm +10 v apc gain control voltage v 4 i ds operating case temperature c -30 to 90 t stg storage temperature c -40 to 125 common electrical characteristics test conditions vdd = +3.5v, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25 c unless otherwise stated. parameter test conditions symbol min typ max units supply voltage v dd 2.7 3.5 5.3 v leakage current v apc = 0.06v i dd 20 a control voltage range v apc 0v dd C 0.3 v control current i apc 3ma nominal input impedance z in 50 ? nominal output impedance z out 50 ? rise and fall time t r to (p out1 C 0.5 db) v apc set to achieve p out1 t r, t f 12 s
3 egsm electrical characteristics test conditions vdd= +3.5v, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25 c unless otherwise stated. parameter test conditions symbol min typ max units frequency range f o 880 900 915 mhz output power nominal conditions p in = +2 dbm p out1 34.5 35 dbm v apc = 2.2v efficiency p out =p out1 pae 55 60 % output power in off mode v apc = 0.2v, p in = 4 dbm -40 -36 dbm input power p in 0 2 4 dbm input vswr p in = 0 dbm 1.5 2.5 stability v dd = 3.0 to 5.3v, no parasitic oscillation > -36 dbm p in = 0 C 4 dbm, p out 34.5 dbm, v apc 2.2v, vswr 8:1, all phases load mismatch robustness v dd = 3.0 to 5.3v, no module damage or permanent degradation p in = 0 C 4 dbm, p out 34.5 dbm, v apc 2.2v, vswr 10:1, all phases t = 20 sec second harmonic v dd = 3.5v 2f o -5 dbm p in = 0 dbm p out = 34.5 dbm v apc = controlled for p out third harmonic v dd = 3.5v 3f o -5 dbm p in = 0 dbm p out = 34.5 dbm v apc = controlled for p out fourth to eighth harmonics v dd = 3.5v 4f o -8f o -10 dbm p in = 0 dbm p out = 34.5 dbm v apc = controlled for p out noise power f=925 to 935 mhz, p n -72 dbm p out 34.0 dbm, pin = 0 dbm rbw = 100 khz f = 925 to 960 mhz, p n -82 dbm p out 34.0 dbm, pin = 0 dbm rbw = 100 khz band to band isolation measured at dcs freq egsm signal: -25 dbm v dd = 3.5v p in = +2 dbm p out = 34.5 dbm (fixed) control slope (peak) pout = -5 dbm to p out 400 db/v am-am pin = 0 C 4 dbm 5 db/db pout = 6 dbm to p out am-pm pin = 0 C 4 dbm 6 deg/db pout = 6 dbm to p out
4 dcs & pcs electrical characteristics test conditions vdd= +3.5v, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25 c unless otherwise stated. parameter test conditions symbol min typ max units frequency range dcs f o 1710 1750 1785 mhz pcs 1850 1880 1910 output power nominal conditions p in = 2 dbm p out1 32.0 32.5 dbm v apc = 2.2v efficiency p out = p out1 dcs pae 50 56 % pcs pae 50 56 output power in off mode v apc = 0.2v, p in = 4 dbm -40 -36 dbm input power p in 0 2 4 dbm input vswr p in = 0 dbm 1.5 2.5 stability v dd = 3.0 to 5.3v, no parasitic oscillation > -36 dbm p in = 0 C 4 dbm, p out 32 dbm, v apc 2.2v, vswr 8:1, all phases load mismatch robustness v dd = 5.3v, no module damage or permanent degradation p in = 0 C 4 dbm, p out 32 dbm, v apc 2.2v, vswr 10:1, all phases t = 20 sec second harmonic v dd = 3.5v 2f o -5 dbm p in = 0 dbm p out = 32 dbm v apc = controlled for p out third harmonic v dd = 3.5v 3f o -5 dbm p in = 0 dbm p out = 32 dbm v apc = controlled for p out fourth to eighth harmonics v dd = 3.5v 4f o C 8f o -10 dbm p in = 0 dbm p out = 32 dbm v apc = controlled for p out noise power f = 1805 to 1880 mhz, p n -77 dbm f = 1930 to 1990 mhz, p out 31.5 dbm, pin = 0 dbm rbw = 100 khz control slope (peak) pout = -5 dbm to p out1 350 db/v am-am pin = 0 C 4 dbm 5 db/db pout = 6 dbm to p out1 am-pm pin = 0 C 4 dbm 6 deg/db pout = 6 dbm to p out1
5 gprs electrical characteristics test conditions vdd= +3.5v, a pulse width of 1154 s and a duty cycle of 25% at a case temperature of +25 c unless otherwise stated. p sat : pin = 0 dbm; v apc = 2.2v p out (dbm) pae (%) 880 mhz 900 mhz 915 mhz 880 mhz 900 mhz 915 mhz class 8 (1-slot) 35.18 35.40 35.40 60.23 60.47 59.55 class 10 (2-slot) 35.15 35.45 35.43 60.07 61.02 59.77 class 12 (4-slot) 35.16 35.32 35.36 60.09 59.62 59.35 p sat : pin = 0 dbm; v apc = 2.2v p out (dbm) pae (%) 1710 mhz 1750 mhz 1785 mhz 1710 mhz 1750 mhz 1785 mhz class 8 (1-slot) 33.00 33.08 33.12 59.00 59.19 59.62 class 10 (2-slot) 33.00 33.08 33.10 59.35 59.42 59.40 class 12 (4-slot) 33.00 33.08 33.10 59.35 59.42 59.40 p sat : pin = 0 dbm; v apc = 2.2v p out (dbm) pae (%) 1850 mhz 1880 mhz 1910 mhz 1850 mhz 1880 mhz 1910 mhz class 8 (1-slot) 33.10 33.10 33.02 59.14 58.93 58.66 class 10 (2-slot) 33.10 33.10 33.02 59.14 58.93 58.66 class 12 (4-slot) 33.10 33.04 32.96 58.75 58.50 58.25
6 typical performance test conditions: vdd = +3.5v, case temperature of +25 c, and zo=50 ohms unless otherwise stated. vdd (v) figure 1. pae and pout vs vdd (egsm band, pin = 2 dbm, vapc = 2.2v). pout (dbm) 2.7 3.1 3.7 3.9 pae pout 3.3 2.9 3.5 37 36 35 34 33 32 31 pae (%) 64 62 60 58 56 54 52 vdd (v) figure 2. pae and pout vs vdd (dcs 1750 mhz, pin = 2 dbm, vapc = 2.2v). pout (dbm) 2.7 3.1 3.7 3.9 3.3 2.9 3.5 34 33 32 31 30 29 28 pae (%) 58 56 54 52 50 48 46 pae pout vdd (v) figure 3. pae and pout vs vdd (pcs 1880 mhz, pin = 2 dbm, vapc = 2.2v). pout (dbm) 2.7 3.1 3.7 3.9 3.3 2.9 3.5 34 33 32 31 30 29 28 pae (%) 58 56 54 52 50 48 46 pae pout vapc (v) figure 4. pout and idd vs vapc (egsm band, pin = 0 dbm, vdd = 3.5v). pout (dbm) 0.75 1.25 2.25 1.75 40 30 20 10 0 -10 -20 -30 -40 -50 -60 idd (ma) 2000 1800 1600 1400 1200 1000 800 600 400 200 0 idd pout vapc (v) figure 5. pout and idd vs vapc (dcs 1750 mhz, pin= 0 dbm, vdd = 3.5v). pout (dbm) 0.75 1.25 2.25 1.75 40 30 20 10 0 -10 -20 -30 -40 -50 -60 idd (ma) 1000 900 800 700 600 500 400 300 200 100 0 idd pout vapc (v) figure 6. pout and idd vs vapc (pcs 1880 mhz, pin= 0 dbm, vdd = 3.5v). pout (dbm) 0.75 1.25 2.25 1.75 40 30 20 10 0 -10 -20 -30 -40 -50 -60 idd (ma) 1000 900 800 700 600 500 400 300 200 100 0 idd pout vapc (v) figure 7. pout and idd vs vapc (vdd egsm band, pin = 0 dbm, vdd = 3.0v). pout (dbm) 0.75 1.25 2.25 idd pout 1.75 40 30 20 10 0 -10 -20 -30 -40 -50 -60 idd (ma) 2000 1800 1600 1400 1200 1000 800 600 400 200 0 vapc (v) figure 8. pout and idd vs vapc (dcs 1750 mhz, pin = 0 dbm, vdd = 3.0v). pout (dbm) 0.75 1.25 2.25 idd pout 1.75 40 30 20 10 0 -10 -20 -30 -40 -50 -60 idd (ma) 1000 900 800 700 600 500 400 300 200 100 0 vapc (v) figure 9. pout and idd vs vapc (pcs 1880 mhz, pin = 0 dbm, vdd = 3.0v). pout (dbm) 0.75 1.25 2.25 1.75 40 30 20 10 0 -10 -20 -30 -40 -50 -60 idd (ma) 1000 900 800 700 600 500 400 300 200 100 0 idd pout
7 typical performance, continued test conditions: vdd = +3.5v, case temperature of +25 c, and zo=50 ohms unless otherwise stated. frequency (mhz) figure 10. 2 nd and 3 rd harmonic performance (egsm band, pin = 0 dbm, pout = 34.5 dbm, vdd = 3.5v). harmonics (dbm) 880 890 915 895 885 910 905 900 -10 -15 -20 -25 -30 -35 -40 2nd fo 3rd fo frequency (mhz) figure 11. 2 nd and 3 rd harmonic performance (dcs band, pin = 0 dbm, pout = 32 dbm, vdd = 3.5v). harmonics (dbm) 1710 1730 1740 1720 1770 1780 1760 1750 -10 -15 -20 -25 -30 2nd fo 3rd fo frequency (mhz) figure 12. 2 nd and 3 rd harmonic performance (pcs band, pin = 0 dbm, pout = 32 dbm, vdd = 3.5v). harmonics (dbm) 1850 1960 1870 1900 1910 1890 1880 -25 -28 -31 -34 -37 -40 2nd fo 3rd fo frequency (mhz) figure 13. 2 nd and 3 rd harmonic performance (egsm band, pin = 0 dbm, pout = 34.5 dbm, vdd = 3.0v). harmonics (dbm) 880 890 2nd fo 3rd fo 895 885 910 915 905 900 -10 -15 -20 -25 -30 -35 -40 frequency (mhz) figure 14. 2 nd and 3 rd harmonic performance (dcs band, pin = 0 dbm, pout = 32 dbm, vdd = 3.0v). harmonics (dbm) 1710 1730 1740 1720 1770 1780 1760 1750 -15 -20 -25 -30 -35 2nd fo 3rd fo frequency (mhz) figure 15. 2 nd and 3 rd harmonic performance (pcs band, pin = 0 dbm, pout = 32 dbm, vdd = 3.0v). harmonics (dbm) 1850 1870 1880 1860 1900 1910 1890 -20 -25 -30 -35 -40 2nd fo 3rd fo frequency (mhz) figure 16. isolation performance (egsm band, pin = 4 dbm, vapc = 0.2v). isolation (dbm) 880 890 895 885 910 915 905 900 -51 -52 -52 -53 -53 -54 -54 -55 -55 3.0v 3.5v frequency (mhz) figure 17. isolation performance (dcs band, pin = 4 dbm, vapc = 0.2v). isolation (dbm) 1710 1730 1740 1720 1770 1780 1760 1750 -40 -41 -42 -43 -44 -45 3.0v 3.5v frequency (mhz) figure 18. isolation performance (pcs band, pin=4 dbm, vapc=0.2v). isolation (dbm) 1850 1870 1880 1860 1900 1910 1890 -36 -37 -38 -39 -40 -41 3.0v 3.5v
8 typical performance, continued test conditions: vdd = +3.5v, case temperature of +25 c, and zo=50 ohms unless otherwise stated. vapc (v) figure 19. pout/vapc and idd/vapc vs. vapc (egsm band, vdd = 3.5v). pout/vapc (db/v) 0.95 1.45 2.45 idd/vapc pout/vapc 1.95 300 250 200 150 100 50 0 idd/vapc (ma/v) 3000 2500 2000 1500 1000 500 0 vapc (v) figure 20. pout/vapc and idd/vapc vs. vapc (dcs 1750 mhz, vdd = 3.5v). pout/vapc (db/v) 0.70 1.20 2.20 1.70 350 300 250 200 150 100 50 0 idd/vapc (ma/v) 3500 3000 2500 2000 1500 1000 500 0 idd/vapc pout/vapc vapc (v) figure 21. pout/vapc and idd/vapc vs. vapc (pcs 1880 mhz, vdd = 3.5v). pout/vapc (db/v) 0.90 1.40 2.40 1.90 300 250 200 150 100 50 0 idd/vapc (ma/v) 3000 2500 2000 1500 1000 500 0 idd/vapc pout/vapc vapc (v) figure 22. pout/vapc and idd/vapc vs. vapc (egsm band, vdd = 3.0v). pout/vapc (db/v) 0.95 1.45 2.45 1.95 300 250 200 150 100 50 0 idd/vapc (ma/v) 3000 2500 2000 1500 1000 500 0 idd/vapc pout/vapc vapc (v) figure 23. pout/vapc and idd/vapc vs. vapc (dcs 1750 mhz, vdd = 3.0v). pout/vapc (db/v) 0.90 1.40 2.40 1.90 300 250 200 150 100 50 0 idd/vapc (ma/v) 3000 2500 2000 1500 1000 500 0 idd/vapc pout/vapc vapc (v) figure 24. pout/vapc and idd/vapc vs. vapc (pcs 1880 mhz, vdd = 3.0v). pout/vapc (db/v) 0.90 1.40 2.40 1.90 300 250 200 150 100 50 0 idd/vapc (ma/v) 3000 2500 2000 1500 1000 500 0 idd/vapc pout/vapc
9 pin description table no. function description notes 1 gnd 2 vapc egsm egsm control voltage see datasheet figure 4 3 gnd 4 vdd3 egsm egsm supply 3 rd stage 3.5v nominal C output stage, bypass with 0.033 f//220 pf [1] 5 gnd 6 gnd 7 rfout egsm egsm output 50 ? nominal, external d.c. blocking required C 33 pf 8 gnd 9 gnd 10 gnd 11 rfout dcs/pcs dcs/pcs output 50 ? nominal, external d.c. blocking required C 33 pf 12 gnd 13 gnd 14 vdd3 dcs/pcs dcs/pcs supply 3 rd stage 3.5v nominal C output stage, bypass with 0.033 f//27 pf [1] 15 gnd 16 vapc dcs/pcs dcs/pcs control voltage see datasheet figure 5 (dcs) and figure 6 (pcs) 17 gnd 18 rfin dcs/pcs dcs/pcs input +2 dbm gmsk, 50 ? nominal, internally d.c. blocked 19 gnd 20 vdd1,2 dcs/pcs dcs/pcs supply 1 st and 2 nd stages 3.5v nominal C driver stages, bypass with 0.033 f 21 vdd1,2 bypass dcs/pcs 1 st and 2 nd stage bypassing bypass with 12 pf 22 gnd 23 vdd1,2 bypass egsm 1 st and 2 nd stage bypassing bypass with 220 pf 24 vdd1,2 egsm egsm supply 1 st and 2 nd stages 3.5v nominal C driver stages, bypass with 0.033 f 25 gnd 26 rfin egsm egsm input +2 dbm gmsk, 50 ? nominal, internally d.c. blocked note: 1. in addition a 2.2 f capacitor should be connected to pins 4 and 14 or alternatively star connections can be made from a single 2.2 f capacitor keeping the connection distances as short as possible. c7 4 7 c8 egsm rfout 1 vdd vdd 14 dcs/pcs rfin 18 20 c2 vdd agilent acpm-7891 yyww vdd 11 c11 dcs/pcs rfout c9 c13 21 c3 23 c4 24 c5 c14 egsm rfin 26 component label c2 c3 c4 c5 c7 c8 c9 c11 c13 c14 component value .033 f 12 pf 220 pf .033 f 220 pf 33 pf .033 f 33 pf .033 f 27 pf demo board schematic for pa only
10 ordering information part number no. of devices container ACPM-7891-BLK 10 bulk acpm-7891-tr1 1000 13 tape and reel package dimensions 1 13 12 11 10 9 8 7 6 5 0.0352 (0.92) 0.0080 (0.20) 18 19 20 21 22 23 24 25 26 23 agilent acpm-7891 yywwddllll 4 17 16 15 14 0.0000 (0.00) 0.0300 (0.76) 0.0430 (1.09) 0.1932 (4.91) 0.2792 (7.09) 0.4295 (10.91) 0.4644 (11.80) 0.0590 (1.50) 0.0000 (0.00) 0.2362 (6.00) 0.0382 (0.92) 0.0430 (1.09) 0.1932 (4.91) 0.2282 (5.80) 0.0582 (1.48) 0.0835 (2.12) 0.1307 (3.32) 0.1780 (4.52) 0.2062 (5.24) 0.0582 (1.48) 0.0835 (2.12) 0.1307 (3.32) 0.1780 (4.52) 0.2252 (5.72) 0.2725 (6.92) 0.3197 (8.12) 0.3670 (9.32) 0.4142 (10.52) 0.4424 (11.24) 0.4724 (12.00) note: measurements are in inches (millimeters). top view end view bottom view
11 tape dimensions and device orientation agilent acpm-7891 yywwddllll notes: drawing not to scale. measurements are in millimeters (inches). 12.20 (0.476) 2.25 (0.088) 24.00 0.30 (0.936 0.012) 11.50 0.10 (0.449 0.004) 1.75 0.100 (0.068 0.004) 6.66 (0.260) device in carrier tape carrier tape 12.00 (0.468) pin 1 position (permanent) 4.00 0.10 (0.156 0.004) acpm-7891 carrier tape acpm-7891 in carrier tape 2.00 0.10 (0.078 0.004) ? 1.50 ( ? 0.059) ? 1.50 0.100 ( ? 0.059 0.004) 0.30 0.05 (0.012 0.00) user feed direction cover tape carrier tape reel
12 applications information introduction the agilent acpm-7891 provides a cost effective dual or tri-band gsm power amplifier (pa) solu- tion with the additional benefit of multi-slot gprs operation, giving excellent efficiency and extended transmit time. figure 1 illustrates how the acpm-7891 fits into a typical dual-band or tri-band terminal design. the device is internally matched to 50 ? and therefore an effective design can be implemented quickly with a few additional capacitors for d.c. blocking of the output ports and bypassing of the supply pins. the control loop can also be implemented quickly by using an integrated power controller such as the lt1758-2 from linear technology. an example using this controller is given later in this note. the required loop per- formance and stability can be achieved more easily in this way, without the need for complex and time consuming design work around an external error com- parator or discrete schottky diode detector. demoboards are available, and design engineers can evaluate the rf performance of the acpm-7891 power amplifier to implement a solution quickly by using this application note in conjunction with the datasheet. figure 1. acpm-7891 in a typical dual-band or tri-band terminal. antenna coupler switch/diplexer loop control chipset transmit baseband receive 900mhz 900mhz 1800mhz 1800mhz 1900mhz 1900mhz dac acpm-7891 acpm-7891 performance figure 2 plots the actual output power of the acpm-7891 pa for gsm900, dcs1800 and pcs1900 bands as a function of the con- trol voltage, vapc. the input power to the pa is a gmsk modulated rf carrier of a con- stant power level of 2 dbm. the pa s maximum output power is 35 dbm in the gsm900 band, and 33 dbm for the dcs1800/ pcs1900 band at a control volt- age of 2.2v. the input rf carrier and control voltage are both pulsed, following the gsm tdma characteristic response with a period of 4.615ms and a duty cycle of 12.5 ~ 25% per the gsm standard. 40 35 30 25 20 15 10 5 0 -5 -10 -15 -20 0.75 0.95 1.15 1.35 1.55 1.75 1.95 2.15 vapc (v) pout (dbm) egsm dcs pcs figure 2. output power vs. control voltage for the acpm-7891 power amplifier.
13 acpm-7891 evaluation there are two options available when evaluating the acpm-7891. option a is to use the fully assembled and tested acpm-7891 test board from agilent which includes the pa and associated passive compo- nents. this board can be used to evaluate the basic performance of the pa against the typical electrical characteristics pro- vided in the datasheet. all maximum and minimum pa pa- rameters are verified prior to sending out this board. option b allows the pa perfor- mance to be evaluated within a power control loop environment by using the acpm-7891 pa con- trol board from agilent which incorporates the commercially available control loop ic lt1758-2 from linear technolo- gies. this device is used as an example; however, alternative off-the-shelf power control ics are available from linear tech- nologies, analog devices and other suppliers. the acpm-7891 pa control board can be used in conjunction with an lt1758 demoboard, available from lin- ear technologies, which supplies the dac and timing functions. alternatively the dac and tim- ing functions can be supplied by a conventional two channel func- tion generator. demo board test conditions for both types of demoboards, a common set of test conditions apply. tables 1 and 2 detail the test conditions for egsm, dcs and pcs at vdd = +3.5v, pulse width of 1154 s, and a duty cycle of 25% for a case tempera- ture of +25 c. table 1. egsm test conditions. parameter symbol test condition operating frequency f (mhz) tx egsm frequency range: 880 ~ 915 mhz supply voltage vdd (v) nominal voltage 3.5v. extreme voltage conditions of 2.7v and 5.3v input power level pin (dbm) 2 dbm 2 dbm control voltage vapc (v) standard dac output control level estimated at 0.1 to 2.6v. maximum vapc level: vdd-0.3v temperature to (c) -30, +25, +85 c table 2. dcs/pcs test conditions. parameter symbol test condition operating frequency f (mhz) tx dcs frequency range: 1710 ~ 1785 mhz tx pcs frequency range: 1850 ~ 1910 mhz supply voltage vdd (v) nominal voltage 3.5v. extreme voltage conditions of 2.7v and 5.3v input power level pin (dbm) 2 dbm 2 dbm control voltage vapc (v) standard dac output control level estimated at 0.1 to 2.6v. maximum vapc level: vdd-0.3v temperature to (c) -30, +25, +85 c
14 option a acpm-7891 test board figure 3 shows the schematic for the acpm-7891 test board which provides a straightfor- ward method of testing and evaluating the acpm-7891. external rf sources, power and vapc supplies are used. option b power control loop design the implementation of a trans- mitter power control is one of the most engineering-intensive and time-consuming aspects of gsm handset design. it dictates the correct transmit power level and burst shaping in a gsm network. the use of an off-the-shelf power control ic helps simplify the engineering effort and shorten the design cycle time. the acpm-7891 pa control board includes the acpm-7891 pa, linear technology ltc1758-2 power control ic, egsm/dcs/pcs directional cou- plers, tri-band diplexer and a 20-pin interface socket designed to work with an ltc1758 demo board from linear technology. figure 3. schematic of acpm-7891 test board. dcs/pcs rfou t gnd vdd egsm rfout c11 11 14 20 c2 c8 c13 c14 7 4 24 c5 c9 c7 c4 23 26 2 c3 21 18 16 dcs/pcs rfin egsm vapc egsm rfin dcs/pcs vapc 1, 3, 5, 6, 8, 9, 10, 12, 13, 15, 17, 19, 22, 25 component component label value c2 .033 f c3 12 pf c4 220 pf c5 .033 f c7 220 pf c8 33 pf c9 .033 f c11 33 pf c13 .033 f c14 27 pf
15 figure 4 depicts the basic block diagram of the acpm-7891 pa control board, figure 5 shows the control board layout, and table 3 details its bill of materials. the supporting ltc1758 demoboard is available upon request from linear technology. it has a 900 mhz and an 1800 mhz rf channel controlled by the ltc1758. timing signals for txen are generated on the board using a 13 mhz crystal ref- erence. the pctl power control pin is driven by a 10-bit dac and the dac profile can be loaded via a serial port. the se- rial port data is stored in flash memory which is capable of stor- ing eight ramp profiles. the board is supplied preloaded with four gsm power profiles and four dcs power profiles, cover- ing the entire power range. external timing signals can also be used in place of the internal crystal controlled timing. rfou t diplexer directional coupler rfout dcs/pcs directional coupler 50 ? 50 ? 33 pf 33 pf 33 pf 220 pf 2.2 pf 2.2 pf 220 pf 33 pf 11 7 rfout egsm acpm-7891 rfin dcs/pcs rfin egsm 26 vdd egsm vapc egsm 4 2 rfin egsm txen pctl txen vpca vcc vin rf shdn shdn 33 pf vbatt gnd ltc1758 dac 68 ? rfin dcs/pcs 18 16 14 vdd3 dcs/pcs vapc dcs/pcs figure 4. block diagram of the acpm-7891 pa control board.
16 figure 5. acpm-7891 control board layout. table 3. bill of materials for acpm-7891 control board. qty device type, component value & tolerance reference 1 agilent acpm-7891 power amplifier u1 2 cap_c0402-.033 f,+80,-20a .033 f +80 c24,c31 1 cap_c0402- 15pf,5%, 50v, cea 15pf 5% c3 2 cap_c0402- 220pf,10%, 50v, a 220pf10% c33,c36 11 cap_c0402- 33pf,5%, 50v, cea 33pf 5% c4, c5, c8, c9, c10, c27, c28, c32, c35, c44, c45 1 cap_c0402- 47pf,5%, 50v, cea 47pf 5% c7 2 cap_c0603- .1 f,5%, 20v, cea .1 f 5% c2, c6 1 cap_tant_c0805_t-ecst1az225r, cb 2.2 f +/-20% c34 1 cap_tant_smt6032-ecst1az225r, cb 2.2 f +/-20% c4 1 cap_c1206- .47 f,+80-20%, a .47 f +80-20% c1 1 conn20pin_edge20-conn20pin,heab j2 6 tp_flat-tp tp1, tp2, tp4, tp5, tp6, tp7 5 jumper_2 j1, j3, j4, j5, j6 1 murata ldc211g7420h-055, directional coupler x1 1 murata ldc21897m20h-056, directional coupler x3 1 murata lfd31897mdp1a010, diplexer x2 1 cap_1812- 22 f, 10%, 10v, taiyo yuden lmk432 c11 1 linear technology ltc1758_lt_msop8, control loop ic u2 1 mcr01j680, 68 5% r1 2 rc-4-0402-50r0j, 50 5% r2, r3 3 sma_3 rf1, rf2, rf6
17 acpm-7891 pa control board we have designed the acpm-7891 pa control board to interface with the ltc1758 demo board to simplify engineer- ing efforts. test setup i, figure 6, illustrates the equipment setup if the ltc1758 demo board is to be used with the acpm-7891 pa control board. however, the acpm-7891 pa control board can also be tested without using the ltc1758 demo board. test setup ii, figure 7, illustrates the equipment setup under that scenario. serial connection pa control board hp 6623a 20 ways external signal control board power divider 20 db pad 20 db pad hp 8593e hp e4406a vapc ramp tek 2235 hp e4437b computer 3 db pad figure 6. test setup with the lt1758 demoboard. hp e4437b 3 db pad hp 3245a pa control board hp 6623a ramp tx_en vdd shdn tek 2235 vapc ramp power divider 20 db pad hp 8593e hp e4406a 20 db pad figure 7. test setup without the lt1758 demoboard.
18 test setup i (with linear tech board) connect an rf signal generator with gmsk modulated signal to rfin egsm port (rf2) or rfin dcs/pcs (rf1) on the pa con- trol board. the maximum input power at rf1 and rf2 is +10 dbm. typically +2 dbm is applied for the egsm, dcs/pcs channels. connect two measure- ment instruments, one for spectrum analyzer and the other vsa, to rfout (rf6). the maxi- mum output power should be limited to +35 dbm. connect the ltc-1758 demo board and the acpm-7891 pa control board using 20 pin- connection socket. the external signal control board supplies bias voltage to pa control board and three timing signals shdn, txen and pctl to generate v pca signal of the ltc1758. the v pca signal is power control volt- age output and drives v apc voltage of acpm-7891 to define power ramp profile. figure c2 in appendix c details the ltc1758 timing diagram. the rf power supply voltage of the pa control board is set by v batt adj on the external signal control board. this voltage can be varied over a 2.7v to 5.3v range and is nominally set to 3.5v. the v batt voltage can be monitored on tp5 on the pa control board. linear technologies supplies the application program associated with the .txt file to be down- loaded to the flash memory. the program controls the code level of the dac, whose data range is C 1v to +1v. C 1v corre- sponds to the zero code level and the actual 10-bit dac range is 0v to +2.048v. the resolution is set about 2mv per step. the first sample of the data file is assigned the default value, which is included 1251 sample waveform of input data. this is a code value for the lab view application program. the first sample being the default value and the other 1250 samples being the waveform data to be outputted to the dac. the default value will then be loaded into all memory locations after the 1250 samples have been loaded. after programming the flash 16k segments the system can be set to run by setting the rotary switch to the programmed memory segment and resetting the external signal control board using the reset switch. test setup i i (without linear tech board) without ltc1758 demo board, we can get the same test result as above test. in this case, the agilent (hp) 3245a generates two relevant signals, tx_en and ramp with synchronized time. connect an rf signal generator with gmsk modulated signal to rfin egsm port (rf2) or rfin dcs/pcs (rf1) on the pa con- trol board. typically +2 dbm is applied for the egsm, dcs/pcs channels. connect two measure- ment instruments, one for spectrum analyzer and the other vsa, to rfout (rf6). the maxi- mum output power should be limited to +35 dbm. agilent (hp) e4406a: the agilent e4406a, transmitter tester is used to measure power level in egsm/dcs/pcs mode displaying the characteristic time mask. agilent (hp) e4437b: the signal generator is used to provide gmsk gsm modulated input sig- nal at a defined frequency. agilent (hp)8593e: the agilent 8991a is a spectrum analyzer used to measure the output power of diplexer in the fre- quency and time domain. tek 2235: the tek 2235 is an oscilloscope used to monitor ramp signal and vapc con- nected using the test points of pa control board. agilent (hp) 6623a: the agilent 6623a, power supply is nomi- nally set to voltage 3.5v for vdd. shdn is set to 2.8v as high mode during txen and ramp are enable. agilent (hp) 3245a: the agilent 3245a, function generator with two channels is set to two rel- evant signals based on the gsm specification. one signal gener- ates tx_en with 2.7v that has a period of 4.615 ms with a duty cycle of 12.5% (577 s) and 216 hz frequency. this tx_en connects to tx_en (tp7) pin on the rf control board. the other signal is ramp signal that is same as pctl of ltc1758. this ramp connects to ramp (tp6) pin on the rf con- trol board.
19 test results using the demoboard with the linear technology ic, the results shown in table 4 were obtained. the ltc1758 ramp signal is generated from a dac and a simple single-pole filter is used to shape the power ramp. the input rf signal is based on the gsm gmsk modulated signal. the results highlight the excellent power control functionality obtained by using the acpm-7891 in conjunction with a power loop controller such as the lt1758. results are given for all three bands, at four example power level settings, with the supply voltage at 3v, 3.6v and 4.3v. the figures show that excellent power output control is maintained over table 4. results with variable vdd and three point frequency ranges gsm900 gsm5 (33 dbm) gsm10 (23 dbm) gsm15 (13 dbm) gsm19 (5 dbm) frequency vdd vapc pout vapc pout vapc pout vapc pout (v) (v) (dbm) (v) (dbm) (v) (dbm) (v) (dbm) 900 mhz 3.0 2.00 33.07 1.3 23.54 1.1 13.49 1.0 5.09 3.6 1.60 33.04 1.3 23.55 1.1 13.51 1.0 5.12 4.3 1.58 33.04 1.3 23.56 1.1 13.52 1.0 5.09 dcs1800 dcs0 (30 dbm) dcs5 (20 dbm) dcs10 (10 dbm) dcs15 (0 dbm) frequency vdd vapc pout vapc pout vapc pout vapc pout (v) (v) (dbm) (v) (dbm) (v) (dbm) (v) (dbm) 1750 mhz 3.0 2.0 30.35 1.3 20.20 1.1 10.42 1.0 0.08 3.6 1.7 30.32 1.3 20.17 1.1 10.40 1.0 0.06 4.3 1.7 30.28 1.3 20.14 1.1 10.37 1.0 0.06 pcs1900 pcs0 (30 dbm) pcs5 (20 dbm) pcs10 (10 dbm) pcs15 (0 dbm) frequency vdd vapc pout vapc pout vapc pout vapc pout (v) (v) (dbm) (v) (dbm) (v) (dbm) (v) (dbm) 1880 mhz 3.0 1.95 29.26 1.3 20.12 1.1 10.64 1.0 -0.04 3.6 1.7 29.24 1.3 20.10 1.1 10.60 1.0 -0.05 4.3 1.7 29.20 1.3 20.07 1.1 10.56 1.0 -0.09 this supply voltage range, illus- trating that the acpm-7891 can enable designs that meet gsm transmitter specifications.
20 g appendix a acpm-7891 pa control board layout bottom gnd power top
21 0.150 [3.82] 0.220 [5.59] 0.043 [1.09] 0.011 [0.26] 0.022 [0.56] 0.022 [0.56] 0.236 [6.00] 0.2317 [5.52] 0.189 [4.80] 0.142 [3.60] 0.236 [2.40] 0.047 [1.20] 0.000 [0.00] 0.000 [0.00] 0.024 [0.60] 0.071 [1.80] 0.099 [2.52] 0.118 [3.00] figure b1. recommended stencil. appendix b stencil design on pcb for acpm-7891 in order to dissipate heat, addi- tional via holes on the pcb are needed on the printed circuit board. solder mask should not be applied to thermal/ground plane underneath the vias in a way that will reduce heat transfer efficiency from conductive paddle to ambient. the stencil design enables solder paste to fill up the vias and form a solid conducting bar that further improves the thermal dissipation. a properly designed solder screen or stencil is required to ensure optimum amount of sol- der paste is deposited onto the pcb pads. the recommended stencil layout is shown in figure b1. the stencil has a solder paste deposition opening approxi- mately 90% of the pcb pad. reducing stencil opening of the conductive paddle potentially generate void underneath, on the other hand stencil opening larger than 100% will lead to excessive solder paste smear across the conductive paddle to adjacent i/o pads.
22 appendix c ltc1758 theory of operation the ltc1758-2 is a dual band rf power controller for rf power amplifiers operating in the 850 mhz to 2 ghz range. rf power is controlled by driv- ing the rf amplifier power control pins and sensing the resultant rf output power via a directional coupler. the rf sense voltage is peak detected using an on-chip schottky diode. this detected voltage is com- pared to the dac voltage at the pctl pin to control the output power. the rf power amplifier is protected against high supply current and high power control pin voltages. internal and exter- nal offsets are cancelled over temperature by an autozero con- trol loop, allowing accurate low power programming. the shut- down feature disables the part and reduces the supply current to <1_a. modes of operation the ltc1758-2 supports three operating modes: shutdown, autozero and enable. in shutdown mode (shdn = low) the part is disabled and supply currents will be reduced to <1_a. vpca and vpcb will be connected to ground via 100_ switches. in autozero mode (shdn = high, txen = low) vpca and vpcb will remain connected to ground and the part will be in the autozero mode. the part must remain in autozero for at least 50_s to allow for the autozero circuit to settle. in enable mode (shdn = high, txen = high) the control loop and protection functions will be operational. when txen is switched high, acquisition will begin. the control amplifier will start to ramp the control voltage to the rf power amplifier. the rf amplifier will then start to turn on. the feedback signal from the directional coupler and the output power will be detected by the ltc1758-2 at the top view 1 rf shdn bsel gnd 10 9 8 7 txen pctl 6 2 3 4 5 v in v cc v pca v pcb ms10 package 10-lead plastic msop shutdown shdn bsel txen pctl v pca v pcb start voltage start voltage note 1 autozero enable t 1 t 2 t s ts: autozero settling time, 50 s minimum t1: bsel change prior to txen, 200ns typical t2: bsel change after txen, 200ns typical note 1: the external dac driving the pctl pin can be enabled during autozero. the autozero system will cancel the dac transient. the dac must be settled to an offset 400mv before txen is asserted hi g h. mode shutdown autozero enable shdn low high high txen low low high operation disabled autozero power control figure c1. ltc-1758-2 pinout. rf pin. the loop closes and the amplifier output tracks the dac voltage ramping at pctl. the rf power output will then follow the programmed power profile from the dac. the ltc1758 datasheet provides more detailed description of the part s operation and can be downloaded from linear technology s website. figure c2. ltc1758-2 timing diagram.
www.agilent.com/semiconductors for product information and a complete list of distributors, please go to our web site. for technical assistance call: americas/canada: +1 (800) 235-0312 or (916) 788-6763 europe: +49 (0) 6441 92460 china: 10800 650 0017 hong kong: (+65) 6271 2451 india, australia, new zealand: (+65) 6271 2394 japan: (+81 3) 3335-8152(domestic/international), or 0120-61-1280(domestic only) korea: (+65) 6271 2194 malaysia, singapore: (+65) 6271 2054 taiwan: (+65) 6271 2654 data subject to change. copyright ? 2003 agilent technologies, inc. obsoletes 5988-8926en june 18, 2003 5988-9542en

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